This invention relates to etching and, more particularly, to chemical etching semiconductor material so that the etching automatically stops at a predetermined location.
In the manufacture of semiconductor devices, it is often necessary to etch some of the semiconductor material away. For example, when manufacturing high voltage power devices, it is often necessary to form a mesa or a moat to expose the edge of a PN junction. The surface of the mesa or the moat is normally covered with a passivation material to maximize the surface breakdown voltage of the device, to minimize its leakage current and to maximize its surface stability.
Etching these configurations involves the formation of an oxide, typically silicon dioxide (SiO.sub.2), on the surface to be etched and then selectively removing the oxide to expose the area to be etched. Typically, oxide removal is done in accordance with photolithographic techniques generally well known in the art. After the oxide has been removed, the semiconductor material is exposed to an etchant to remove that material adjacent the openings. When this conventional technique is used, several failure modes are common. First, it is not unusual to etch to a non-uniform depth resulting in the loss of semiconductor product. A conventional etchant, known in the art as a FAN etch, comprises a solution of hydrofluoric (HF), acetic (CH.sub.3 COOH) and nitric (HNO.sub.3) acids. Because the FAN etch is so strong, it is usual to leave the photoresist material in place over the oxide to protect those areas of the material which are not to be etched. If there is any imperfection in the photoresist or the oxide the FAN etch can attack the underlying silicon resulting in the loss of semiconductor product.